The currently proposed tunnel FETs (TFETs) can be classified into three types. A first type TFET includes source and channel regions having the same conductivity type and is formed on a bulk semiconductor substrate. A second type TFET includes source and channel regions having opposite conductivity types and is formed on a bulk semiconductor substrate. A third type TFET includes source and channel regions having the same conductivity type and is formed on an SOI substrate. Although such different types of TFETs are proposed, there are few proposals on a circuit including TFETs formed on a semiconductor substrate. However, a TFET circuit has problems different from problems with a MOSFET circuit, and such problems need to be resolved. For example, when the TFETs are electrically connected by an interconnect to form an inverter circuit, source and drain regions of the TFETs on an interconnect side are electrically floating, and therefore a leakage current caused by this needs to be suppressed. Unfortunately, if the TFET circuit is formed by using a structure for resolving such problems, the resulting semiconductor device may have a complicated structure.